XR16C2850 -Dual UART with TX and RX FIFO Counters, 128-Bytes FIFO and Automatic RS-485 Half Duplex Control

XR16C2850
Dual UART with TX and RX FIFO Counters, 128-Bytes FIFO and Automatic RS-485 Half Duplex Control

特性

Added feature in devices with a top mark date code of "F2 YYWW" and newer:
- 5V tolerant inputs
- 0 ns address hold time (T_AH)
Pin-to-pin compatible and functionally compatible to Exar’s ST16C2550 and XR16L2750 and TI’s TL16C752B in the 48-TQFP package
Pin-alike Exar’s XR16L2750 and ST16C2550 48-TQFP package but with additional CLK8/16, CLKSEL and HDCNTL inputs
Two independent UART channels
- Register set compatible to 16C550
- Up to 6.25 Mbps at 5V, and 4 Mbps at 3.3V
- Transmit and Receive FIFOs of 128 bytes
- Programmable TX and RX FIFO Trigger Levels
- Transmit and Receive FIFO Level Counters
- Automatic Hardware (RTS/CTS) Flow Control
- Selectable Auto RTS Flow Control Hysteresis
- Automatic Software (Xon/Xoff) Flow Control
- Auto RS-485 Half-duplex Direction Control
- Wireless Infrared (IrDA 1.0) Encoder/Decoder
- Full modem interface
Device Identification and Revision
Crystal oscillator or external clock input
Industrial and commercial temperature ranges
48-TQFP and 44-PLCC packages
Pb-Free, RoHS Compliant Versions Offered

应用

Portable Appliances
Telecommunication Network Routers
Ethernet Network Routers
Cellular Data Devices
Factory Automation and Process Controls

描述

The XR16C2850 (2850) is an enhanced dual universal asynchronous receiver and transmitter (UART). Enhanced features include 128 bytes of TX and RX FIFOs, programmable TX and RX FIFO trigger level, FIFO level counters, automatic (RTS/CTS) hardware and (Xon/Xoff) software flow control, automatic RS-485 half duplex direction control output and data rates up to 6.25 Mbps at 5V and 8X sampling clock. Onboard status registers provide the user with operational status and data error flags. An internal loopback capability allows system diagnostics. The 2850 has a full modem interface and can operate at 2.97V to 5.5V and is pin-to-pin compatible to Exar’s ST16C2550 and XR16L2750 except the 48-TQFP package. The 2850 register set is compatible to the industry standard ST16C2550 and is available in 48-pin TQFP and 44-pin PLCC packages.

For UART technical support or to obtain an IBIS model for this product, please email Exar's UART Technical Support group.

器件型号	封装编码	有害物质限制	最低温度	最高温度	状态	立刻购买	申请样片
XR16C2850CJ-F	PLCC44		0	70	Active
XR16C2850CM-F	TQFP48		0	70	Active
XR16C2850IJ-F	PLCC44		-40	85	Active
XR16C2850IM-F	TQFP48		-40	85	Active

器件状态注释

Active（在售）-该器件可用于销售，标准产品

EOL(停产)-该器件不再生产,库存中可能有也可能没有存货

CF(联系工厂)-该器件仍然在销售，但是客户应该与相关工厂检查是否供货。适用于有较长交货期的情况。

PRE(准备投产)-该器件还未上市或者此型号还仅是用于样产的早期版本/样品阶段。

OBS(废弃)-器件不再生产，并停止订购。

NRND(不推荐用于新设计中)-不推荐在新设计中选择该器件。

规格
频道	2
中央处理器接口	Intel
数据传输速率@5/3.3/2.5V	6.2/4.0/na @8X
发送器/接收器FIFO(Bytes)	128/128
发送器/接收器FIFOCtrs	Yes
发送器/接收器FIFOINT Trig	Program/ Program
自动RTS/CTS	Yes
IrDa供应	Yes
5VTol输入	Yes
电压供应	2.97-5.5
封装	PLCC-44 TQFP-48

文档


	Linux 2.6.13 Drivers Version 1.0.0 十二月 2009 10.84 KB
	Linux 2.6.18 Drivers Version 1.0.0 十二月 2009 12.11 KB
	Windows XP & 2000 Drivers Version 1.3.0.0 十二月 2009 61.02 KB

	???
	Datasheet Version 2.1.3 十一月 2005 891.53 KB
	PCI Eval Board Schematic Version 1.1.0 七月 2007 167.82 KB
	ISA Eval Board Schematic Version 1.4.0 八月 2007 109.05 KB

	????
	DAN-130, EXAR's ST16C2550 vs. TL16C752B Version 1.0.0 六月 2002 119.34 KB
	DAN-107, Interfacing 16Cxxx UARTs to a CPU Version 1.0.0 八月 1999 32.43 KB
	DAN-160, Migrating from XR16C2850 to XR16L2750 Version 1.0.0 六月 2002 22.18 KB
	DAN-161, Migrating from XR16C2850 to XR16L2751 Version 1.0.0 八月 2002 23.00 KB
	DAN-190, Exar UARTs in RS-485 Applications Version 1.0.0 四月 2008 147.31 KB
	AN-204, UART Sleep Mode Version 1.0.0 六月 2010 511.72 KB

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	Evaluation Board User's Manual Version 1.3.0 八月 2003 24.69 KB